Solid State Transformer (SST): Three Typical Topologies and Technology Evolution Roadmap

The core technical pathway of SST can be summarized as follows: power frequency alternating current (AC) is inverted into high-frequency square waves (typical frequency range: 10–100 kHz) via power electronic converters, electrical isolation and voltage ratio adjustment are achieved through a high-frequency transformer, and the waveform is then reconstructed into the target power frequency AC or direct current (DC) by subsequent-stage converters. In this process, the design of high-frequency magnetic components determines the system's power density, while the topology of the power electronic converter directly governs system efficiency, voltage level adaptability, control complexity, and cost budget.

After more than half a century of technological iteration, SST topologies have evolved into a diversified system. Based on the logic of topological evolution and engineering application requirements, this paper systematically elaborates on the working mechanisms, technical characteristics, and applicable scenarios of three typical topologies. Integrating wide bandgap (WBG) device applications and commercialization cases, it supplements key circuit implementation details and selection methodologies, presenting a complete technical panorama of SST from theoretical topology to engineering implementation.

I. Single-Stage AC-AC Conversion Topology: The Technical Prototype of SST

The single-stage AC-AC topology is a landmark structure in the early development of SST and the only topological form that does not require an intermediate DC link. Its core concept is the integrated design of 'direct conversion – high-frequency isolation – waveform reconstruction.'

Topological Principle and Circuit Implementation
This topology uses matrix converters (MC) or cycloconverters as the core conversion units to directly convert power frequency AC to high-frequency AC. After isolation and voltage transformation via a high-frequency transformer, it is then inverted back to the target power frequency AC or rectified to DC.

In 1976, W. McMurray of General Electric (GE) in the United States proposed a high-frequency coupled AC-AC circuit as a typical implementation of this topology. Its core circuit consists of a primary-side fully controlled bridge (S1-S2), a high-frequency transformer (turns ratio k), and a secondary-side fully controlled bridge (S3-S4):

• Primary side: S1-S2 operate in a high-frequency complementary conduction mode (switching frequency fs = 20–50 kHz), inverting the input power frequency sine wave (Vin = Um sinωt) into a high-frequency square wave with an amplitude of ±Vin instantaneous value.
  
• Isolation and transformation: The high-frequency transformer, designed with soft magnetic materials (e.g., ferrite, nanocrystalline alloys), utilizes high-frequency magnetic field coupling to achieve primary-secondary electrical isolation and voltage transformation (Vout_hf = k・Vin_hf).
  
• Secondary side: S3-S4 operate synchronously with the primary-side switches. By adjusting the phase shift angle φ (0 ≤ φ ≤ π) between the primary and secondary switches, the output voltage amplitude is controlled (Vout_rms ∝ cosφ). After filtering out high-frequency harmonics via an LC low-pass filter (cutoff frequency fc = 1 kHz), a sinusoidal output voltage is obtained.
  

Its advantages lie in its compact structure, small size, and relatively low cost, which can reduce the difficulty of equipment lightweighting to a certain extent. However, its disadvantages are also prominent: on the one hand, the lack of an intermediate DC link makes it impossible to achieve reactive power compensation or isolate input-side voltage disturbances, resulting in poor adaptability to grid fluctuations; on the other hand, the control strategy is extremely complex, power flow control is difficult, and it is challenging to achieve high-power, high-voltage energy conversion. It is mostly used in low-voltage, low-power, simple power supply scenarios with low power quality requirements.

II. Three-Stage AC-DC-AC Conversion Topology: A Mature Architecture with Integrated Functions

In the 1990s, the three-stage AC-DC-AC topology proposed by Runan and Sudnoff et al. addressed the performance bottlenecks of single-stage topologies through the functionally decoupled design of 'rectification – isolation – inversion,' marking the entry of SST technology into the engineering application phase.

Topological Levels and Core Functions
This topology adopts a three-stage architecture of 'input stage – isolation stage – output stage,' where each level has independent functions and can be flexibly configured:

• Input stage (rectification stage): Uses three-phase two-level/three-level PWM rectifiers (e.g., Vienna rectifier, NPC rectifier). Core functions include:
  
• Power frequency AC → DC conversion: outputs a stable DC bus voltage (Vdc = 1.35 Vin_line).
  
• Power quality management: achieves unity power factor (PF ≥ 0.99) and sinusoidal input current (THD ≤ 3%).
  
• Grid adaptability: possesses low voltage ride-through (LVRT) capability and can withstand ±20% voltage fluctuations.
  
• Isolation stage (DC-DC conversion stage): The core unit of the topology, employing topologies such as Dual Active Bridge (DAB) and LLC resonant converters. Functions include:
  
• Electrical isolation: achieves primary-secondary potential isolation via a high-frequency transformer (withstand voltage level ≥ 2 kV).
  
• Voltage regulation: provides a wide transformation ratio range (0.5–2.0) to adapt to different load voltage requirements.
  
• Soft switching implementation: achieves ZVS/ZCS turn-on for switching devices through phase-shift control or resonant mechanisms, reducing switching losses.
  
• Output stage (inversion stage): Uses two-level/multilevel inverters. Functions include:
  
• DC → AC conversion: outputs a power frequency sine wave (voltage accuracy ±1%, frequency accuracy ±0.1 Hz).
  
• Load adaptability: supports linear/non-linear loads and possesses reactive power compensation capability (Q regulation range ±0.5 pu).
  

Technical Advantages and Engineering Evolution
The core advantage of the three-stage topology lies in its functional decoupling and expandability:

• DC bus interface: The intermediate DC link (Vdc) can directly interface with distributed energy sources such as photovoltaics (PV) and battery energy storage systems (BESS), enabling integrated 'source-grid-load-storage' access.
  
• Hierarchical control strategy: The input stage uses PI control in the dq coordinate system for PFC, the isolation stage uses phase-shift control to regulate power flow, and the output stage uses voltage droop control to ensure stable power supply. The control of each stage is independent and non-interfering.
  
• Technical maturity: After over 20 years of engineering validation, standardized design processes have been formed, with over a thousand application cases in scenarios such as 10 kV distribution networks and renewable energy grid integration.
  

Its technological evolution is mainly reflected in two aspects:

• Device upgrade: Early stages used IGBTs (1200 V/1700 V), which are now gradually being replaced by SiC MOSFETs. The switching frequency has increased from 10 kHz to 50 kHz, and system efficiency has risen from 94% to over 97%.
  
• Bidirectional transformation: By replacing the input/output stages with bidirectional converters, bidirectional power flow is achieved, meeting the needs of scenarios such as V2G (Vehicle-to-Grid) and energy storage charging/discharging.
  

III. Modular Multilevel Topology: The Mainstream Solution for Medium/High Voltage and High Power

With the industrialization of wide bandgap semiconductors (SiC/GaN) and the increasing demand for medium/high voltage scenarios (10 kV–35 kV), modular multilevel topologies have become the mainstream technical route for SST due to their advantages in voltage level scalability, strong redundancy, and high power density. The core types include Cascaded H-Bridge (CHB) and Modular Multilevel Converter (MMC).

1. Cascaded H-Bridge (CHB) + ISOP Architecture
CHB combined with the Input-Series Output-Parallel (ISOP) structure is the preferred solution for medium-voltage AC to low-voltage DC scenarios (e.g., data centers, water electrolysis for hydrogen production). Its topological essence is a distributed architecture of 'modular series input – modular parallel output.'

Topological Composition and Working Mechanism

• Input side: Each phase consists of n H-bridge submodules connected in series. The input voltage for each submodule is Vin/n (e.g., for a 10 kV input, with n=10, the single module voltage is 1 kV). Through PWM control of the submodules, multilevel output is achieved (number of levels = 2n+1), reducing input-side harmonics (THD ≤ 2%).
  
• Inside the submodule: Contains an H-bridge rectification stage and an isolated DC-DC conversion stage, where the DC-DC link uses DAB or LLC resonant converters as the core to achieve isolation and voltage regulation within the submodule.
  
• Output side: The DC-DC outputs of all submodules are connected in parallel to a low-voltage DC bus (e.g., 800 V DC). The total output current Iout = ΣIi (where Ii is the output current of a single submodule), enabling high current output.
  

Core Technical Advantages

• Voltage scalability: Through series stacking of submodules, it can adapt to 10 kV–35 kV medium voltage levels without relying on high-voltage power devices, using only 1200 V/1700 V SiC MOSFETs.
  
• Redundancy and reliability: Supports N+1/N+2 redundant configurations. If a single submodule fails, it can be quickly isolated via a bypass switch, with system capacity only decreasing by 1/(n+1), ensuring no downtime risk.
  
• Power density optimization: Standardized submodule design with liquid cooling achieves a power density of 2.5–3.0 kW/L, an increase of over 50% compared to three-stage topologies.
  

2. Modular Multilevel Converter (MMC)
MMC consists of half-bridge/full-bridge submodules forming converter arms. It achieves multilevel output through capacitor voltage balancing control of the submodules and is the standard topology for HVDC transmission. In recent years, it has been gradually extended to medium-voltage SST applications.

Its core characteristics are:

• Topological structure: Each phase consists of upper and lower converter arms, each containing m half-bridge submodules, sharing a common medium-voltage DC bus (Vdc).
  
• Advantageous scenarios: Suitable for medium-voltage DC interconnection (e.g., MVDC microgrids), enabling direct MVAC→MVDC conversion without the need for an additional DC-DC stage.
  
• Technical bottlenecks: The submodule capacitors have large capacity (needed to support the converter arm voltage), leading to bulky size; control is complex, requiring solutions for circulating current suppression and capacitor voltage balancing. Its cost-effectiveness in low-voltage, high-current scenarios (e.g., LVDC output) is lower than that of the CHB+ISOP architecture.
  

3. Comparison of Isolated DC-DC Topologies
In modular architectures, the selection of the isolated DC-DC converter directly impacts system performance. A technical comparison of the two mainstream topologies is as follows:

IV. Frontier Exploration: Commercial Breakthrough of Multi-Port SST

Currently, SST technology is evolving from a single conversion function towards an 'energy router.' The multi-port SST system launched by the American company DG Matrix represents a key breakthrough from the laboratory to commercial delivery, and its technical route provides a new engineering paradigm for the industry.

1. Core Architectural Innovation: Single-Stage Magnetically Coupled Multi-Port Topology
DG Matrix's SST adopts a 'single-stage high-frequency AC conversion + multi-winding magnetic coupling' architecture, breaking through the structural limitations of traditional three-stage topologies:

• Conversion mechanism: Eliminates the need for an intermediate DC link. A single power stage directly converts low-frequency AC to high-frequency AC, driving a multi-winding high-frequency transformer.
  
• Multi-port expansion: Multiple independent windings are set on the secondary side of the transformer, each corresponding to an output port that can be flexibly configured for AC or DC output. The marginal cost of port expansion is less than 10%.
  
• Key breakthrough: Eliminates the DC bus capacitor found in traditional SSTs, avoiding failure points such as capacitor aging and thermal runaway, while fully leveraging the high-frequency characteristics of SiC devices (switching frequency ≥ 100 kHz).
  

2. Engineering Implementation Parameters

Core Technical Parameters:

• Magnetic component design: Liquid-cooled high-frequency transformer, operating frequency 100 kHz, insulation class H.
  
• Cooling solution: Patented tornado vortex liquid cooling technology, transistor thermal resistance 0.3°C/W (compared to 1.0°C/W in traditional solutions), supporting over 300 million deep thermal cycles.
  
• Control architecture: FPGA+AI hybrid control, sampling frequency 10 MHz (100 ns granularity), fault response time ≤ 1 μs.
  

3. Target Application Scenarios and Technical Advantages

4. Commercialization Progress and Challenges

• Timeline: Small batch shipments in Q1 2026, UL 1741 certification completion in Q2, 1 MW expansion module launch in Q3.
  
• Key challenges: Insulation design for high-voltage ports (13.8–34.5 kV), long-term operational reliability verification, OCP (Open Compute Project) platform compatibility testing.
  

V. Specific Circuit Implementation: Dual-Port Single-Stage AC/DC Converter

To clarify the engineering implementation details of the basic topology, the following takes a three-phase three-switch single-stage AC/DC converter as an example to elaborate its circuit design, control strategy, and simulation verification results.

1. Topological Structure Design
This converter adopts an integrated structure of 'PWM rectification + forward-flyback isolation.' The core components include:

• Input side: Three-phase power frequency AC input (line voltage 660 V), with series input inductance L_in = 175 μH to suppress current harmonics.
  
• Power conversion stage: Three IGBT switches (S1-S3), switching frequency 20 kHz, achieving AC → high-frequency square wave conversion.
  
• High-frequency transformer: Primary winding Np = 28, secondary power winding Ns = 12, demagnetization winding Nd = 3, turns ratio k = Ns/Np = 0.428.
  
• Output side: Freewheeling diode D1, demagnetization diode Dd, output inductance Lo = 130 μH, filter capacitor Co = 1000 μF, output DC voltage 225 V.
  

2. Operating Mode Analysis
This converter operates in a combined state of Discontinuous Conduction Mode (DCM) and Continuous Conduction Mode (CCM):

• Mode 1 (Switch conduction period, t∈[0, Ton]): S1-S3 conduct. The input voltage is applied to Np, magnetizing the core. Ns supplies power to the load via D1, and Lo stores energy.
  
• Mode 2 (Switch turn-off period, t∈[Ton, T]): S1-S3 turn off. The core forms a demagnetization circuit through Nd and Dd, completing magnetic reset. Lo releases energy to the load via the freewheeling diode, ensuring continuous output current.
  

3. Control Strategy Implementation
A dual closed-loop control of 'voltage outer loop + current inner loop' is adopted:

• Outer loop: Samples the output voltage Vout, compares it with the reference voltage Vref (225 V), and outputs the current reference value Id_ref via a PI controller.
  
• Inner loop: Samples the input current Iin, compares it with Id_ref, generates a modulation wave via a PI controller, and compares it with a triangular carrier wave (20 kHz) to produce PWM drive signals.
  
• Power factor correction: Through dq coordinate transformation, the input current is made to be in phase with the voltage, achieving unity power factor (PF ≥ 0.99).
  

4. Simulation Verification Results
A simulation model was built using MATLAB/Simulink, and the key indicators were verified as follows:

• Power quality: Input current THD = 2.8%, power factor PF = 0.992.
  
• Output characteristics: Vout = 225 V ± 0.5 V, voltage ripple ΔV = 1.2 V (ripple factor 0.53%).
  
• Dynamic response: When the load suddenly changes (50% → 100%), the voltage recovery time is ≤ 5 ms.
  

Topology Comparison and Selection Guide

1. Core Characteristic Comparison of Three Typical Topologies

2. Selection Decision Process

• Determine voltage/power level: Choose single-stage for low-voltage, low-power (≤10 kW); three-stage for medium-voltage, medium-power (10 kW–1 MVA); modular multilevel for medium/high-voltage, high-power (≥500 kVA).
  
• Evaluate power quality requirements: For strict requirements on THD and power factor (e.g., data centers, precision manufacturing), prioritize three-stage or modular topologies.
  
• Consider reliability requirements: For continuous operation scenarios (e.g., chemical industry, rail transit), choose modular topologies with N+1 redundancy configuration.
  
• Economic trade-off: For cost-sensitive scenarios (e.g., simple power supply), choose single-stage; for function-prioritized scenarios (e.g., renewable energy grid integration), choose three-stage/modular.
  

Conclusion

The evolutionary journey of solid-state transformer topologies is essentially a technological iteration process of 'increasing power density, enhancing functional integration, and expanding voltage levels.' The single-stage topology established the core concept of high-frequency isolation. The three-stage topology achieved functional decoupling and engineering implementation. The modular multilevel topology, through device cascading and redundant design, meets the demands of medium/high-voltage and high-power scenarios. Currently, multi-port topologies, represented by DG Matrix, are driving the transformation of SST from a 'single converter' to an 'energy router.' The deep application of SiC/GaN devices and the integration of AI control algorithms will further enhance system efficiency and control flexibility.

In the future, the development direction of SST topologies will focus on three dimensions: first, the standardized design of multi-port, AC/DC hybrid topologies; second, the optimization of modular architectures for ultra-high voltage (≥35 kV) scenarios; and third, full lifecycle control strategies based on digital twins. As technological maturity and commercialization levels improve, SST is expected to become the core hub for energy conversion, transmission, and dispatch in the Energy Internet, driving the power system towards greater efficiency, flexibility, and intelligence.